Y
YeeDeeAii
Guest
Dies ist der Abschnitt I wurde mit habe Probleme mit: library IEEE; USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.STD_LOGIC_UNSIGNED.ALL; ENTITY NoteTabs IS PORT (clk: in std_logic; ToneIndex: OUT std_logic_vector (3 DOWNTO 0)); END; ARCHITECTURE einer NoteTabs IS COMPONENT MUSIC PORT (Adresse: IN std_logic_vector (7 downto 0); inclock: in std_logic; q: OUT std_logic_vector (3 DOWNTO 0)); End-Komponente; SIGNAL Counter: std_logic_vector (7 downto 0); BEGIN CNT8: PROCESS (clk, Counter) BEGIN IF Zähler = 138 THEN Zähler